型号OPA4872
品牌
分类高速运算放大器 (GBW ≥ 50MHz)
描述具有 4:1 高速多路复用器的 12V、500MHz 高速运算放大器
产品概述

参数

Diff gain (%) 0.035
Iout (typ) (A) 0.075
Vs (min) (V) 7
Vs (max) (V) 12
Diff phase (°) 0.005
Operating temperature range (°C) -40 to 85
Rating Catalog

封装 | 引脚 | 尺寸

SOIC (D) 14 51.9 mm² 8.65 x 6

特性

  • 500MHz SMALL-SIGNAL BANDWIDTH
  • 500MHz, 2VPP BANDWIDTH
  • 0.1dB GAIN FLATNESS to 120MHz
  • 10ns CHANNEL SWITCHING TIME
  • LOW SWITCHING GLITCH: 40mVPP
  • 2300V/µs SLEW RATE
  • 0.035%/0.005° DIFFERENTIAL GAIN, PHASE
  • QUIESCENT CURRENT = 10.6mA
  • 1.1mA QUIESCENT CURRENT IN SHUTDOWN MODE
  • 88dB OFF ISOLATION IN DISABLE OR SHUTDOWN (10MHz)
  • APPLICATIONS
    • VIDEO ROUTER
    • LCD AND PLASMA DISPLAY
    • HIGH SPEED PGA
    • DROP-IN UPGRADE TO AD8174

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    说明

    The OPA4872 offers a very wideband 4:1 multiplexer in an SO-14 package. Using only 10.6mA, the OPA4872 provides a user-settable output amplifier gain with greater than 500MHz large-signal bandwidth (2VPP). The switching glitch is improved over earlier solutions using a new (patented) input stage switching approach. This technique uses current steering as the input switch while maintaining an overall closed-loop design. The OPA4872 exhibits an off isolation of 88dB in either Disable or Shutdown mode. With greater than 500MHz small-signal bandwidth at a gain of 2, the OPA4872 gives a typical 0.1dB gain flatness to greater than 120MHz.

    System power may be optimized using the chip enable feature for the OPA4872. Taking the chip enable (EN) line high powers down the OPA4872 to less than3.4mA total supply current. Further power reduction to 1.1mA quiescent current can be achieved by bringing the shutdown (SD) line high. Muxing multiple OPA4872s outputs together, then using the chip enable to select which channels are active, increases the number of possible inputs.