型号LPC662
品牌
分类通用运算放大器
描述双路、15V、350kHz 运算放大器
产品概述

参数

Number of channels 2
Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15
Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 5
Rail-to-rail In to V-, Out
GBW (typ) (MHz) 0.35
Slew rate (typ) (V/µs) 0.11
Vos (offset voltage at 25°C) (max) (mV) 3
Iq per channel (typ) (mA) 0.043
Vn at 1 kHz (typ) (nV√Hz) 42
Rating Catalog
Operating temperature range (°C) -40 to 85
Offset drift (typ) (V/°C) 0.0000013
Input bias current (max) (pA) 4
CMRR (typ) (dB) 83
Iout (typ) (A) 0.021
Architecture CMOS
Input common mode headroom (to negative supply) (typ) (V) -0.4
Input common mode headroom (to positive supply) (typ) (V) -1.9
Output swing headroom (to negative supply) (typ) (V) 0.004
Output swing headroom (to positive supply) (typ) (V) -0.013

封装 | 引脚 | 尺寸

SOIC (D) 8 29.4 mm² 4.9 x 6

特性

Rail-to-rail output swing

Micropower operation (<0.5 mW)

Specified for 100 k and 5 k loads

High voltage gain

120 dB

Low input offset voltage

3 mV

Low offset voltage drift

1.3 µV/°C

Ultra low input bias current

2 fA

Input common-mode includes GND

Operating range from +5V to +15V

Low distortion

0.01% at 1 kHz

Slew rate

0.11 V/µs

Full military temperature range available


说明

The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 k and 5 k) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 0.5 mW.

This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.

See the LPC660 datasheet for a Quad CMOS operational amplifier and LPC661 for a single CMOS operational amplifier with these same features.